Looking for strong FPGA engineers with experience in both design and verification using VHDL, SystemVerilog, or Verilog. This individual will be responsible for owning all aspects of the development process from ideation to implementation in order to solve complex trading problems.
Responsibilities:
• Use cutting-edge technology while working on high performance/low latency systems
• Collaborate with team members to investigate and create automated trading algorithms
• Work on high-performance computing systems to break speed and performance boundaries
• Build next-generation algorithmic trading systems;
• Solve low latency trading problems and optimization of performance-critical code
• Develop new hardware platforms
• Identifying opportunities for improvement and experimenting with performance optimizations;
• Apply industry knowledge and technical skills in new and innovative ways
Candidate Requirements:
• Development experience with FPGAs (Verilog/VHDL, functional verification, and static timing closure)
• Demonstrated experience with Bash, TCL, and/or Python scripts
• Experience with FPGA design, simulation, and verification tools (Synopsys, Riviera, ModelSim, Questasim, etc.)
• Experience with FPGAs and CPLDs from vendors (Xilinx, Altera)
• A desire to push the boundaries on performance and lower latency
• Passion for innovation and building systems from the ground up
• Demonstrated experience with Bash, TCL, and/or Python scripts
• Demonstrated ability to work in a fast-paced, mission-critical environment
• Careful attention to detail, and the vision and skill to push beyond expectations
